验证230GHzSiGe收发机系统射频电路设计仿真数据集
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230GHz 频段作为太赫兹通信的关键窗口，对收发机射频模块的高频性能提出严苛要求。SiGe 异质结 bipolar 晶体管（HBT）因高截止频率（fT/fmax）和低噪声特性，成为 200GHz 以上频段电路设计的优选方案。本数据集通过模块级仿真验证（如功率放大器、低噪声放大器等），量化了各模块在 230GHz 附近的关键性能指标，填补了 SiGe 工艺在太赫兹频段的仿真数据空白，为芯片流片前的设计迭代提供了理论支撑，显著降低研发成本与流片风险。该数据集聚焦230GHz SiGe 收发机核心射频模块仿真验证，主要面向太赫兹通信芯片设计、高频电路建模与优化领域的研究需求建设。数据由清华大学东主楼微电子学研究所团队于2021 年 5 月至 8 月通过 Cadence Virtuoso 及 ADE 仿真工具生成，包含 8 个文件，总数据量约2.25MB。数据基于Cadence EDA 工具链构建，流程如下：电路设计：使用 Virtuoso 绘制各模块原理图（如功率放大器 PA、低噪声放大器 LNA），定义 SiGe HBT 器件参数（如基极宽度、集电极电流密度）； Testbench 搭建：在 Virtuoso 中创建测试平台（如文件 7-2、7-4 等），设置激励条件（如输入功率、本振信号幅度）；多维度仿真：数字基带（DigBB）：通过 ADE 仿真器进行时域分析，记录 15ns 内关键节点波形（文件 7-1）； 数字调制器（DigMod）：仿真 16-QAM 调制下的星座图与眼图，计算误差矢量幅度（EVM=-26.1dB）（文件 7-3）；LNA/PA：使用 SP（小信号参数）仿真扫描 160GHz-300GHz 频段，提取 S11、S21 等参数（文件 7-5、7-7）； 结果可视化：仿真数据通过 ADE 导出为波形图、星座图及参数曲线（.png 格式）。 数据主要内容，数据集覆盖四大核心模块的仿真环境与性能指标：数字基带：时域波形：展示信号在基带处理各阶段的时序特性（如采样、滤波后的脉冲形状）；数字调制器：16-QAM 星座图：验证调制信号的相位 / 幅度精度，EVM 值反映调制质量；眼图：评估信号在 200ps 时间窗口内的 ISI（码间干扰）水平；低噪声放大器（LNA）：S 参数：S11（输入匹配）<-10dB@230GHz，S21（增益）>15dB，体现高频信号放大能力与噪声抑制特性；功率放大器（PA）：S 参数：输出功率随频率变化曲线，在 230GHz 处饱和功率（Psat）满足发射链路功率需求。数据量：约 2.25MB，均为轻量化图片文件，便于快速查阅与学术引用；工具依赖：仿真环境图需通过 Virtuoso 查看，结果图支持通用图片工具；本数据集完全开放共享，其核心价值在于提供了 230GHz SiGe 射频模块从设计到仿真的全流程数据链。结合后续发布的实测数据集，可构建 “仿真 - 流片 - 测试” 闭环，助力太赫兹通信芯片在 6G、雷达成像等场景的技术突破。
The 230 GHz band serves as a critical window for terahertz (THz) communications, posing stringent requirements on the high-frequency performance of transceiver radio frequency (RF) modules. Silicon-Germanium (SiGe) heterojunction bipolar transistors (HBTs), with their high cutoff frequencies (fT/fmax) and low noise characteristics, have become the preferred solution for circuit design in frequency bands above 200 GHz. This dataset quantifies the key performance indicators of various modules around 230 GHz through module-level simulation validations (e.g., power amplifiers, low-noise amplifiers, etc.), filling the gap in simulation data for SiGe-based processes in the THz frequency band. It provides theoretical support for design iterations prior to chip tape-out, significantly reducing R&D costs and tape-out risks. This dataset focuses on the simulation validation of core RF modules for 230 GHz SiGe transceivers, and was developed to meet research needs in the fields of THz communication chip design, high-frequency circuit modeling and optimization. The dataset was generated by the team from the Institute of Microelectronics, East Main Building, Tsinghua University between May and August 2021 using Cadence Virtuoso and ADE simulation tools. It contains 8 files with a total data volume of approximately 2.25 MB. The dataset is built based on the Cadence EDA toolchain, with the workflow as follows: 1. Circuit Design: Schematic diagrams of each module (e.g., power amplifier PA, low-noise amplifier LNA) were drawn using Virtuoso, and the device parameters of SiGe HBTs (e.g., base width, collector current density) were defined; 2. Testbench Setup: Test benches (e.g., Files 7-2, 7-4, etc.) were created in Virtuoso, and excitation conditions (e.g., input power, local oscillator signal amplitude) were set; 3. Multi-dimensional Simulation: - Digital Baseband (DigBB): Time-domain analysis was performed using the ADE simulator, and key node waveforms within 15 ns were recorded (File 7-1); - Digital Modulator (DigMod): Constellation diagrams and eye diagrams under 16-QAM modulation were simulated, and the error vector magnitude (EVM = -26.1 dB) was calculated (File 7-3); - LNA/PA: Small-signal parameter (SP) simulations were performed to scan the 160 GHz–300 GHz frequency band, and parameters such as S11 and S21 were extracted (Files 7-5, 7-7); 4. Result Visualization: Simulation data was exported by ADE as waveform diagrams, constellation diagrams and parameter curves in .png format. Main Content of the Dataset: The dataset covers the simulation environments and performance indicators of four core modules: - Digital Baseband: Time-domain waveforms, which show the timing characteristics of signals at each stage of baseband processing (e.g., pulse shapes after sampling and filtering); - Digital Modulator: 16-QAM constellation diagrams to verify the phase/amplitude accuracy of modulated signals, with EVM values reflecting modulation quality; Eye diagrams to evaluate the inter-symbol interference (ISI) level of signals within a 200 ps time window; - Low-Noise Amplifier (LNA): S-parameters, where S11 (input matching) < -10 dB @ 230 GHz and S21 (gain) > 15 dB, reflecting the high-frequency signal amplification capability and noise suppression performance; - Power Amplifier (PA): S-parameters, including output power vs. frequency curves, with the saturated power (Psat) at 230 GHz meeting the power requirements of the transmission link. Data Volume: Approximately 2.25 MB, all of which are lightweight image files for quick access and academic citation; Tool Dependencies: Simulation environment diagrams need to be viewed via Virtuoso, while the result diagrams are compatible with common image tools; This dataset is fully open and shared. Its core value lies in providing a full-process data chain from design to simulation for 230 GHz SiGe RF modules. Combined with the subsequently released measured datasets, a "simulation-tape-out-testing" closed loop can be established, facilitating technological breakthroughs of THz communication chips in scenarios such as 6G and radar imaging.
