40GSps 8bit ADC数据手册

AAD08S040G 是采用CMOS 工艺制造的高速模数转换芯片。采样率最高可达40GS/s，分辨率为8bit。芯片核心部分架构如图1 所示。该芯片采用多路时间交织ADC（TI-ADC）架构，共集成128 路子ADC，每一路ADC 采用低功耗逐次比较（SAR）架构。在输出接口方面，芯片集成16 路高速串行输出接口，每路最高速率20Gbps。芯片将转换的8bit 数字信号与PRBS11 码进行异或运算加扰，然后通过高速串行接口输出。AAD08S040G is a high-speed analog-to-digital converter (ADC) chip manufactured using CMOS process. It supports a maximum sampling rate of 40 GS/s and has an 8-bit resolution. The core architecture of the chip is illustrated in Figure 1. This chip adopts a multi-channel time-interleaved ADC (TI-ADC) architecture, integrating a total of 128 sub-ADC channels. Each sub-ADC employs a low-power successive approximation register (SAR) architecture. For the output interfaces, the chip integrates 16 high-speed serial output channels, with each channel supporting a maximum data rate of 20 Gbps. The chip performs an XOR operation between the converted 8-bit digital signal and the PRBS11 code for scrambling, and then outputs the scrambled signal through the high-speed serial interfaces.